The present disclosure relates to a display apparatus including thin film transistors (TFTs) each having an oxide semiconductor layer as a channel and a method of manufacturing such a display apparatus.
Heretofore, it has been customary for liquid crystal displays (LCDs) to incorporate TFTs having a channel-etched bottom gate structure wherein a channel layer and a source and drain electrode assembly are directly stacked one on the other. One problem with LCDs with such TFTs is that electric capacitances (cross capacitances) between interconnects around the TFTs are large because of requirements for high-definition images to be displayed and increased frame rates.
Many TFTs including an oxide semiconductor as a channel layer have a bottom gate structure wherein the channel area includes a protective film. The channel layer that is mainly formed of an oxide semiconductor is improved to minimize damage due to various plasmas at the time the TFTs are fabricated. For example, according to Japanese Patent Laid-open No. 2008-205469, after a channel layer is formed, the surface of the channel layer is processed by an oxygen plasma and cleaned in a wet environment to increase the electric resistance of the surface of the channel layer. The increased electric resistance is effective to prevent the surface of the channel layer from being damaged and to reduce deteriorations of the characteristics of the channel layer in subsequent fabrication processes.